000 | 01281cam a2200337 a 4500 | ||
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001 | 3559252 | ||
003 | APU | ||
005 | 20150810191823.0 | ||
008 | 980106s1998 enka bi 001 0 eng | ||
010 | _a 98009176 | ||
020 | _a047198325X (hbk.) | ||
020 | _a9780471983255 (hbk.) | ||
035 | _a(DLC) 98009176 | ||
040 |
_aAPU _cAPU _dBNF _dSUE _beng |
||
050 | 0 | 0 |
_aTK7885.7 _b.R87 1998 |
082 | 0 | 0 |
_a621.395 _221 _bRUS 1998 |
100 | 1 |
_aRushton, Andrew. _918494 |
|
245 | 1 | 0 |
_aVHDL for logic synthesis / _cAndrew Rushton. |
250 | _a2nd ed. | ||
260 |
_aNew York : _bJohn Wiley Sons, _cc1998. |
||
300 |
_axiii 375 p. : _bill. ; _c24 cm. |
||
504 | _aIncludes bibliographical references and index. | ||
650 | 0 |
_aVHDL (Computer hardware description language) _916731 |
|
650 | 0 |
_aLogic design _xData processing. _918290 |
|
650 | 0 |
_aComputer-aided design. _94168 |
|
856 | 4 | 2 |
_3Publisher description _uhttp://www.loc.gov/catdir/description/wiley037/98009176.html |
856 | 4 |
_3Table of Contents _uhttp://www.loc.gov/catdir/toc/onix03/98009176.html |
|
906 |
_a7 _bcbc _corignew _d1 _eocip _f19 _gy-gencatlg |
||
942 |
_2lcc _cBook |
||
999 |
_c9704 _d9704 |