Introduction to logic synthesis using Verilog HDL / Robert B. Reese, Mitchell A. Thornton.
Material type:
Item type | Current library | Collection | Call number | Copy number | Status | Date due | Barcode |
---|---|---|---|---|---|---|---|
![]() |
APU Library Open Shelf | Book | TK7868.L6 R44 2006 c.1 (Browse shelf (Opens below)) | 1 | Available (No use restrictions) | 00024498 |
Browsing APU Library shelves, Shelving location: Open Shelf, Collection: Book Close shelf browser (Hides shelf browser)
![]() |
![]() |
![]() |
![]() |
![]() |
![]() |
![]() |
||
TK7868.L6 M37 2005 c.1 Introduction to logic design / | TK7868.L6 M37 2010 c.1 Introduction to logic design / | TK7868.L6 M37 2010 c.2 Introduction to logic design / | TK7868.L6 R44 2006 c.1 Introduction to logic synthesis using Verilog HDL / | TK7868.L6 R68 2010 c.1 Fundamentals of logic design / | TK7868.L6 R68 2010 c.1 Fundamentals of logic design / | TK7868.L6 Y37 1997 c.1 Digital logic : |
Includes bibliographical references.
There are no comments on this title.